Unit 1: Propositional Logic, Predicates & Truth Tables 35 mins study timeFOUNDATION

Propositional Logic, Logical Connectives & Formal Truth Tables

Formal study of propositions, truth functional operators (AND, OR, NOT, IMPLIES, BICONDITIONAL), and tautologies.

Verified: Faculty Peer Review Board

Learning Objectives

Essential Prerequisites

Layer 1: Intuition & Why It Matters

The Core Mental Model

“Propositional Logic ka matlab hai: "Ek aisa statement jo ya to 100% Sach (True) ho ya 100% Jhooth (False), beech me koi confusion nahi!" Jaise: - "Dilli Bharat ki rajdhani hai" -> Sach (True). - "2 + 2 = 5" -> Jhooth (False). Lekin "Aap kaise hain?" koi proposition nahi hai kyunki iski koi truth value nahi hoti. Sabse important concept hai Conditional Statement (P -> Q): "Agar P hua, to Q hoga." Sochiye ek professor ne kaha: "Agar aap exam me 90+ marks layenge, to main aapko A grade dunga." - Agar aap 90+ laye aur A mila -> Professor sach bola (True). - Agar aap 90+ laye aur A nahi mila -> Professor ne dhokha diya (False). - Lekin agar aap 90+ laye hi nahi, aur professor ne fir bhi A de diya, to professor ne jhooth nahi bola! Isko kehte hain Vacuous Truth!”

Why This Exists

Computer science ka har CPU transistor logic gates (AND, OR, NOT) par chalta hai, aur software program conditionals (`if/else`) strictly propositional logic ke rules follow karte hain.

Beginner Foundation

Propositional Logic ka matlab hai: "Ek aisa statement jo ya to 100% Sach (True) ho ya 100% Jhooth (False), beech me koi confusion nahi!" Jaise: - "Dilli Bharat ki rajdhani hai" -> Sach (True). - "2 + 2 = 5" -> Jhooth (False). Lekin "Aap kaise hain?" koi proposition nahi hai kyunki iski koi truth va...

Micro Concepts Decomposition

MICRO CONCEPT 1Canonical Object

Propositional Logic, Logical Connectives & Formal Truth Tables — Conceptual Mechanics & Core Logic

Formal study of propositions, truth functional operators (AND, OR, NOT, IMPLIES, BICONDITIONAL), and tautologies.

Key Takeaway: Understanding the internal dynamics of Propositional Logic, Logical Connectives & Formal Truth Tables establishes the mental model required for complex systems engineering.

MICRO CONCEPT 2Canonical Object

Propositional Logic, Logical Connectives & Formal Truth Tables — Mathematical Formalism & Boundary Invariants

Formal constraints, mathematical bounds, and boundary edge cases for Propositional Logic, Logical Connectives & Formal Truth Tables.

Key Takeaway: Rigorous verification of edge conditions prevents runtime degradation and security flaws.

Layer 3 & 4: Formal Specification & Mechanism

Hardware State Machine Architecture

A proposition is a declarative statement that is either true (denoted T or 1) or false (denoted F or 0). Logical Connectives: 1. Negation: ¬P (NOT) 2. Conjunction: P ∧ Q (AND) 3. Disjunction: P ∨ Q (OR) 4. Conditional: P → Q (IMPLICATION), equivalent to ¬P ∨ Q 5. Biconditional: P ↔ Q (EQUIVALENCE), equivalent to (P → Q) ∧ (Q → P) Tautology: A compound statement that is true under every possible truth assignment of its components. Contradiction: A compound statement that is false under every possible truth assignment. De Morgan's Laws: ¬(P ∧ Q) ≡ ¬P ∨ ¬Q ¬(P ∨ Q) ≡ ¬P ∧ ¬Q

1. Identify n independent atomic variables yielding 2^n truth combinations. 2. Evaluate sub-expressions inside parentheses first according to operator precedence (¬, ∧, ∨, →, ↔). 3. Construct truth column for each connective. 4. If final output column contains all 1s, formula is a tautology.

Layer 7: Interactive Laboratory

Interactive Simulator

COA • LABDirect Memory Access (DMA) & Cycle Stealing Laboratory

Launch Fullscreen Lab

COA • SYSTEM BUS & INTERCONNECTMulti-Master Bus Arbitration

Bus Arbitration Protocols & Priority Resolution Laboratory

Bus Master Devices (Click to Toggle Bus Request BR)Priority Order: Device 1 > Device 2 > Device 3

Master Device 1IDLE

Priority: Rank #1

Master Device 2BUS GRANTED

Priority: Rank #2

Master Device 3REQUESTING

Priority: Rank #3

Signal Wire Topology & Bus Controller State:DAISY CHAINING

[Bus Controller] ---BG Line---> [Device 1] ---BG Line---> [Device 2] ---BG Line---> [Device 3]

Common Bus Request Line (BR): HIGH (Asserted)

Bus Busy Line (BBSY): HIGH (Occupied by Device 2)

Engineering Tradeoffs:

Daisy Chaining: Lowest hardware cost (requires only 3 control lines regardless of master count). However, propagation delay is proportional to device count ($O(n)$), and any device failure in the chain breaks grant transmission down the line.

Layer 5: Step-by-Step Worked Numerical Example

End-to-End Execution Trace

Prove (P → Q) ≡ (¬Q → ¬P) (Contrapositive Law): Case 1: P=T, Q=T -> P→Q = T, ¬Q→¬P = F→F = T (Match) Case 2: P=T, Q=F -> P→Q = F, ¬Q→¬P = T→F = F (Match) Case 3: P=F, Q=T -> P→Q = T, ¬Q→¬P = F→T = T (Match) Case 4: P=F, Q=F -> P→Q = T, ¬Q→¬P = T→T = T (Match) All 4 rows evaluate to identical truth values, proving logical equivalence.

Layer 6: Active Runtime CodeLab

Step-by-Step Code Execution (PYTHON)

SQL Studio

AURXON Sandbox

AURXON Digital Engine

Font

main.pyGlacier Light

Ln 1 • Python 3.12

337 chars • 15 lines • Ln 1UTF-8 • 4 Spaces

Interactive Terminal Shell

Sandbox Terminal Ready

Click Run Code or press Ctrl+Enter to compile and execute.

⚡ AURXON Bitstream Runtime v4.8IDRAS Academic Virtual Node

Layer 8: Practice & Knowledge Verification

Active Assessment Quiz

No Practice Questions Configured

Questions for this topic are currently undergoing faculty review.

Academic Evaluation Preparation

Viva Examination & University Scoring Strategy

Standard Viva Examination Questions

How to Write High-Scoring University Exam Answers

Define proposition, define the 5 primary connectives with their truth tables, write out the truth table for De Morgan's laws across all 4 rows, and conclude with the definition of logical equivalence.