IDRASAcademic OS
UNIVERSAL WALKTHROUGH & SIMULATION GUIDEBilingual • English & Hinglish • Cycle-Accurate Mechanics

Master Laboratory Walkthrough & How-To Guide

Har ek laboratory aur simulation ka complete step-by-step walkthrough: controls kaise use karein, internal hardware/algorithm kaise kaam karta hai, screen par kya badalta hai, aur kaunse test pattern values run karke 100% concepts verify karein.

CS301 • COAComponent: BOOTH

Booth's Signed Integer Multiplier ALU Laboratory

Signed binary numbers ko step-by-step multiply karne wala hardware ALU simulator.

Lab Launch Karein

1. How to Use / Controls Guide

  • 11. Input Values Dalein: Multiplicand (M) aur Multiplier (Q) me signed numbers dalein (jaise +7 aur -3).
  • 22. Step Clock Dabayein: 'Step Clock' button se har ek clock pulse par ek single micro-operation execute hota hai.
  • 33. Auto Run Play: Agar pura multiplication automatic dekhna hai toh 'Play' button click karein.
  • 44. Reset: 'Reset' button se registers wapas initial clean state me chale jaate hain.

2. How It Works (Silicon & Logic)

Internal silicon me hardware register Q ki last bit (Q0) aur previous bit (Q-1) ko compare karta hai. Jab '10' transition milti hai toh A me se M subtract hota hai, aur jab '01' milti hai toh A me M add hota hai. Uske baad Arithmetic Right Shift (ASHR) chalta hai jo sign bit preserve karke 2's complement negative result ko correct rakhta hai.

Screen Par Kya Change Hota Hai:

  • Register Values Change: Register A me addition ya subtraction hone par values cyan color me glow karti hain.
  • Bits Shift Hoti Hain: A ki rightmost bit Q me shift hoti hai, aur Q0 bit Q-1 me record hoti hai.
  • State Table Update: Screen ke neeche table me har cycle ka number, operation aur registers ki nayi binary value jud jaati hai.
  • Final Result: Jab saari cycles complete hoti hain, [A : Q] me verified signed product decimal aur binary me show hota hai.

3. Pattern Values To Run (Test Vectors)

Positive x Negative (Classic Booth Test)
M = +7, Q = -3

Cycle 1 me sub, Cycle 2 me add, Cycle 3 me sub. Final answer: -21 aayega.

Negative x Negative (Sign Inversion Test)
M = -4, Q = -5

Negative signs cancel out hokar positive answer +20 generate hoga.

Contiguous 1s (Worst-case Speedup Test)
M = +6, Q = +7 (0111 in binary)

3 baar add karne ke bajaye sirf 1 subtraction aur 1 addition se +42 calculate hoga.

Telemetry: Live registers (A, M, Q, Q-1), clock count, step-by-step arithmetic table, aur 2's complement binary representation.
CS301 • COAComponent: CACHE_MEMORY

Cache Memory Mapping & LRU Replacement Laboratory

CPU Cache SRAM memory ka simulator: Direct-Mapped, Set-Associative, aur LRU replacement.

Lab Launch Karein

1. How to Use / Controls Guide

  • 11. Cache Type Chunein: Direct-Mapped, 2-Way ya 4-Way Set Associative select karein.
  • 22. Hex Address Dalein: 12-bit address likhein (jaise 0x01A) ya presets button par click karein.
  • 33. Access Address Dabayein: Memory request cache controller me jaati hai.
  • 44. Hit / Miss Dekhein: Agar data cache me mila toh Green Hit, nahi mila toh Red Miss dikhai dega.

2. How It Works (Silicon & Logic)

CPU address ko 3 hisson me todta hai: Tag, Set Index, aur Byte Offset. Set Index se pata chalta hai kaunse row me check karna hai. Agar Tag match ho gaya aur Valid bit 1 hai, toh Cache Hit hota hai. Agar miss hua, toh DRAM se naya block aayega aur LRU (Least Recently Used) policy purane data ko nikaal degi.

Screen Par Kya Change Hota Hai:

  • Address Color Breakup: Address ke bits alag-alag colors me divide ho jaate hain (Tag=Purple, Set=Blue, Offset=Amber).
  • Target Row Highlight: Jis cache set me address map hota hai, woh row glow karta hai.
  • Hit/Miss Status: Hit aane par Green badge aur Miss par Red badge flash hota hai.
  • LRU Counters: Purani lines ka counter badh jaata hai aur naye access ka counter 0 reset hota hai.

3. Pattern Values To Run (Test Vectors)

Compulsory Cold Miss followed by Hit
Access 0x010, then Access 0x010 again

Pehli baar Miss hoga (cold miss), doosri baar wahi address 100% Hit karega.

Direct-Mapped Conflict Thrashing
Alternate 0x000 and 0x040 in Direct-Mapped mode

Dono addresses same set me map hokar ek doosre ko bar-bar evict karte hain (0% hit rate thrashing).

Associativity Eliminating Thrashing
Switch to 2-Way Set Associative and repeat 0x000, 0x040

2-Way me dono blocks Way 0 aur Way 1 me fit ho jaate hain, aur thrashing khatam ho jaati hai.

Telemetry: Hit Rate percentage, Total Misses, Tag comparison hardware, SRAM memory matrix, aur LRU eviction stack.
CS301 • COAComponent: PIPELINE_HAZARD

5-Stage RISC CPU Pipeline Hazard & Forwarding Unit

5-Stage CPU Pipeline visualizer: RAW hazards, stalls (bubbles), aur forwarding unit bypass.

Lab Launch Karein

1. How to Use / Controls Guide

  • 11. Program Chunein: RAW Hazard, Load-Use Hazard ya Normal program select karein.
  • 22. Forwarding Unit Toggle: Hardware bypass unit ko ON ya OFF karke difference dekhein.
  • 33. Step Clock Dabayein: Har step par instructions agle pipeline stage (IF -> ID -> EX -> MEM -> WB) me badhti hain.
  • 44. Stall Bubbles Dekhein: Jab dependency solve nahi hoti, pipeline me stall bubble inject hota hai.

2. How It Works (Silicon & Logic)

Pipeline ek saath 5 instructions execute karti hai. Par agar pehli instruction ka output doosri instruction ko input chahiye, toh RAW data hazard hota hai. Bina forwarding ke CPU ko 2-3 cycles tak rukna padta hai (Stall). Forwarding unit EX stage ke output se direct wire nikaal kar doosri instruction ke ALU me daal deta hai, jisse zero stall me execution complete hota hai.

Screen Par Kya Change Hota Hai:

  • Grid Motion: Har instruction pipeline stages me right side move hoti hai.
  • Hazard Red Alert: Dependent registers red color me highlight hote hain.
  • Green Forwarding Path: Forwarding ON hone par EX stage se green bypass arrow draw hota hai.
  • CPI Metric: Cycles Per Instruction update hota hai (ideally 1.0, stall aane par badh jaata hai).

3. Pattern Values To Run (Test Vectors)

RAW Hazard without Forwarding
ADD R1, R2, R3 followed by SUB R4, R1, R5 (Forwarding OFF)

2 stall bubbles aate hain kyunki R1 WB stage ke baad hi read ho sakta hai.

RAW Hazard with Forwarding Enabled
ADD R1, R2, R3 followed by SUB R4, R1, R5 (Forwarding ON)

Forwarding unit R1 ko directly bypass kar deti hai. Zero stalls, continuous flow!

Load-Use Hazard (Unavoidable 1-Cycle Stall)
LW R1, 0(R2) followed by ADD R3, R1, R4

Memory read hone me time lagta hai, isliye forwarding ke baad bhi 1 stall bubble zaroor aayega.

Telemetry: Pipeline space-time diagram, forwarding multiplexer wires, stall bubbles, aur Cycles Per Instruction (CPI).
CS302 • DSAComponent: BST

Binary Search Tree (BST) & AVL Balance Laboratory

Binary Search Tree insertion, deletion, aur AVL rotations ka animated visualizer.

Lab Launch Karein

1. How to Use / Controls Guide

  • 11. Number Dalein: Input box me integer likhein aur 'Insert Node' par click karein.
  • 22. Search Karein: Kisi number ko search karein aur dekhein root se comparison kaise hota hai.
  • 33. Delete Case: Leaf node, 1-child ya 2-children deletion ka behavior dekhein.
  • 44. Traversal Dekhein: Inorder, Preorder, Postorder buttons se tree traversals animate hoti hain.

2. How It Works (Silicon & Logic)

Har node ka left child chhota hota hai aur right child bada hota hai. Search karte waqt har step par tree aadha ho jaata hai O(log N). Agar tree unbalance ho jaye, toh AVL rotations (LL, RR, LR, RL) automatically tree ko balance karke height O(log N) maintain rakhti hain.

Screen Par Kya Change Hota Hai:

  • Comparison Highlight: Jis node par pointer jaata hai woh yellow color me glow karta hai.
  • Connecting Lines: Parent aur child ke beech animated connection line draw hoti hai.
  • Rotations Animation: Unbalance hone par nodes pivot hokar balanced position le leti hain.
  • Sorted Output: Inorder traversal hamesha sorted ascending order me output bar me show hoti hai.

3. Pattern Values To Run (Test Vectors)

Balanced Tree Construction
Insert 50, 25, 75, 10, 30, 60, 90

Height 3 ka perfectly balanced tree banta hai jisme search fastest O(log N) hoti hai.

Skewed Degenerate Tree (Worst Case)
Insert sorted sequence: 10, 20, 30, 40, 50

Standard BST seedhi line (linked list) ban jaata hai, height 5 aur search O(N) ho jaati hai.

AVL Left-Right (LR) Double Rotation
Insert 30, 10, 20 in AVL mode

LR unbalance detect karke pehle left fir right rotation karta hai, 20 root ban jaata hai.

Telemetry: Tree height, balance factors, sorted traversal array, aur total comparisons count.
CS307 • SQLComponent: SQL_JOIN

Relational Database SQL JOIN & Hash Join Visualizer

SQL Joins ka visual engine: INNER, LEFT, RIGHT, FULL OUTER joins aur row-matching Venn diagrams.

Lab Launch Karein

1. How to Use / Controls Guide

  • 11. Join Type Chunein: INNER, LEFT, RIGHT, ya FULL OUTER join button par click karein.
  • 22. Tables Dekhein: Table A aur Table B side-by-side show hoti hain.
  • 33. Execute Query Dabayein: Keys compare hoti hain aur matches highlight hote hain.
  • 44. Result Table Dekhein: Matching rows combine hoti hain aur missing records me NULL aata hai.

2. How It Works (Silicon & Logic)

Database dono tables ke join columns ko match karta hai. INNER JOIN sirf wahi rows deta hai jo dono taraf match ho. LEFT JOIN left table ki saari rows deta hai chahe right side match ho ya na ho (missing data NULL hota hai). Modern database Hash Join algorithm use karke O(M + N) speed me join karta hai.

Screen Par Kya Change Hota Hai:

  • Venn Diagram Shade: Join type ke according Venn diagram ka matching area highlight hota hai.
  • Matching Lines: Matching foreign keys ke beech animated connection lines banti hain.
  • NULL Badges: Jahan right side record nahi milta, wahan NULL badge dikhai deta hai.
  • Live SQL Query: ANSI SQL query real-time me update hoti hai jise copy kar sakte hain.

3. Pattern Values To Run (Test Vectors)

INNER JOIN (Strict Intersection)
Students JOIN Enrollments ON id

Sirf unhi students ka data aayega jinki course enrollment exist karti hai.

LEFT JOIN (Preserve All Master Records)
Students LEFT JOIN Enrollments ON id

Saare students aayenge, jinone course nahi liya unke aage NULL aayega.

FULL OUTER JOIN (Complete Set Union)
Students FULL OUTER JOIN Enrollments ON id

Dono tables ka pura data aayega, missing links dono taraf NULL ho jayenge.

Telemetry: Interactive Venn diagrams, base tables comparison, ANSI SQL code, aur final joined output table.
CS402 • NETWORKSComponent: TCP_HANDSHAKE

TCP 3-Way Handshake & Connection Teardown Laboratory

TCP 3-Way Handshake (SYN, SYN-ACK, ACK) aur connection teardown ka packet visualizer.

Lab Launch Karein

1. How to Use / Controls Guide

  • 11. Handshake Start Karein: 'Initiate 3-Way Handshake' dabayein; Client SYN packet bhejta hai.
  • 22. Packet Travel Dekhein: Packet screen par Client se Server ki taraf transit karta hai.
  • 33. Seq aur ACK Numbers Check Karein: Har step par ACK = Seq + 1 calculate hota hai.
  • 44. Close Connection: 'Close Connection' se 4-way FIN handshake aur TIME_WAIT state dikhta hai.

2. How It Works (Silicon & Logic)

TCP reliable connection establish karne ke liye 3 steps leta hai. Step 1 me Client apna random sequence number x bhejta hai (SYN). Step 2 me Server x + 1 acknowledge karke apna sequence number y bhejta hai (SYN-ACK). Step 3 me Client y + 1 acknowledge karta hai (ACK). Ab dono taraf ESTABLISHED state ho jaati hai aur data flow shuru hota hai.

Screen Par Kya Change Hota Hai:

  • Packet Motion: Packet screen par move karta hai jisme header flags (SYN, ACK) print hote hain.
  • State Badges Update: Sockets CLOSED se LISTEN, fir SYN_SENT se ESTABLISHED me badal jaate hain.
  • Numbers Increment: Sequence aur ACK numbers mathematically increment hote hain.
  • Packet Sniffer Log: Wireshark style log table me har packet ki entry generate hoti hai.

3. Pattern Values To Run (Test Vectors)

Standard Clean Handshake
Client Port 54321 -> Server Port 80 (HTTP)

1.5 RTT time me standard connection establish ho jaata hai.

Simulated Packet Drop & Retransmission
Toggle 'Simulate Network Packet Loss' on SYN-ACK

Timer expire hone par Client dubara SYN packet re-transmit karega.

Graceful 4-Way FIN Teardown
Click 'Send FIN' from ESTABLISHED state

Dono sides alag-alag FIN aur ACK bhej kar connection close karti hain.

Telemetry: Client aur Server ke FSM states, TCP segment header flags, sequence numbers, aur Wireshark trace table.
CS303 • EDAComponent: DATA_DISTRIBUTION

Tukey's IQR & Statistical Outlier Studio

Statistics me Quartiles, IQR, aur Boxplot outlier detection fences ka interactive visualizer.

Lab Launch Karein

1. How to Use / Controls Guide

  • 11. Dataset Chunein: Normal distribution, skewed distribution ya 'Add Outlier' button dabayein.
  • 22. Tukey Multiplier Slider: 1.5x IQR slider ko adjust karke fences ko chhota ya bada karein.
  • 33. Box Plot Dekhein: Median (Q2), Q1, Q3 aur whiskers lines ko graphically dekhein.
  • 44. Outliers Highlight: Fences ke bahar wale extreme points red color me highlight ho jaate hain.

2. How It Works (Silicon & Logic)

Data ko sort karke 25th percentile (Q1) aur 75th percentile (Q3) calculate hoti hai. IQR = Q3 - Q1 hota hai. Lower fence = Q1 - 1.5*IQR aur Upper fence = Q3 + 1.5*IQR. Jo bhi values in dono fences ke bahar girte hain, unhe statistical outlier mana jata hai.

Screen Par Kya Change Hota Hai:

  • Box Plot Update: Slider hilane par boxplot ke whiskers live adjust hote hain.
  • Color Shift: Normal points cyan rehte hain aur outliers red ho jaate hain.
  • Stats Table: Mean, Median, Std Dev, Q1, Q3 aur IQR real-time recalculate hote hain.
  • Outlier Count: Screen par outliers ki exact count aur percentage display hoti hai.

3. Pattern Values To Run (Test Vectors)

Standard Normal Distribution (Gaussian)
Sample size N = 100, Mean = 50, Std = 10

Symmetric distribution jisme lagbhag 0.7% normal points fences ke bahar fall karte hain.

Right-Skewed Income Distribution
Add extreme outlier: value = 350

Median stable rehta hai par Mean shift ho jaata hai; 350 Upper fence ke bahar red dot ban jaata hai.

Tightening Fences to 1.0x IQR
Slide Tukey Multiplier to 1.0x

Fences choti ho jaati hain aur zyada points outlier list me aa jaate hain.

Telemetry: SVG Boxplot, histogram curve, 5-number summary (Min, Q1, Med, Q3, Max), aur detected outlier points.