IDRASAcademic OS
Interactive Hardware VisualizerRadix-2 Booth Architecture

Booth's Signed Multiplier State Machine

Inspect register transitions, arithmetic operations, and sign-preserving arithmetic right shifts in real-time.

= 0111₂
= 1101₂
Accumulator [A]4 bits
0
0
0
0
Positive sign
Multiplier [Q]4 bits
0
0
0
0
Q₀ = 0 (Inspected Bit)
Transition Register [Q₋₁]1 bit
0
Window (Q₀, Q₋₁) = (00)
Hardware ConstantsCycle 0/4
M (+7):0000
-M (2's comp):0000
Sequence Counter:4
Status: Ready
What is happening right now?

Configure operands and start the simulator.

Why did this transition occur?

Booth's algorithm state machine visualizer.

Step 1 of 0
Speed:

Step-by-Step Hardware Trace Log

StepCyclePhaseOperationAQQ₋₁SC
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